Difference between revisions of "ICP-RIE: Dielectric Etcher"

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|InstrumentName = Dielectric Etcher
|InstrumentName = Dielectric Etcher
|HeaderColor = #FFE2B9
|HeaderColor = #FFE2B9
|ImageOne = ICP-RIE_Dielectric-Material-Etcher.jpg
|ImageOne = ICP-RIE_Dielectric-Material-Etcher_.jpg
|ImageTwo =  
|ImageTwo =  
|InstrumentType = [[Equipment_List#Etching|Etching]]
|InstrumentType = [[Equipment_List#Etching|Etching]]
|RoomLocation = B235 Steele
|RoomLocation = B235 Steele
|LabPhone = 626-395-1532
|LabPhone = 626-395-1532
|PrimaryStaff = [[Nathan S. Lee]]
|PrimaryStaff = [[Kelly McKenzie]]
|StaffEmail = nathslee@caltech.edu
|StaffEmail = kmmckenz@caltech.edu
|StaffPhone = 626-395-1319
|StaffPhone = 626-395-5732
|Manufacturer = Oxford Instruments
|Manufacturer = Oxford Instruments
|Techniques = pseudoBosch<br>Cryogenic silicon etch
|Techniques = Dielectric Material Etching
|EmailList =  kni-oxfordicp
|EmailList =  kni-oxfordicp
|EmailListName = Oxford ICP
|EmailListName = Oxford ICP
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}}
}}
== Description ==
== Description ==
The Dielectric Inductively Coupled Plasma - Reactive Ion Etch (ICP-RIE) is an Oxford Instruments Plasma Technology Plasmalab System 100 ICP-RIE 380 system that is optimized for silicon etching. This system is configured for silicon etching with "pseudoBosch" C<sub>4</sub>F<sub>8</sub> and SF<sub>6</sub> gases, and cryogenic silicon etch with SF<sub>6</sub> and O<sub>2</sub>. The silicon ICP-RIE has a variable temperature stage (-150 to 400 °C). This system supports wafer sizes up to 6 inches, and provides accurate deep etching capabilities for silicon and "silicon-like" samples only.  
The Dielectric inductively-coupled plasma reactive-ion etcher (ICP-RIE) is an Oxford Instruments Plasma Technology Plasmalab System 100 ICP-RIE 380 system that is optimized for silicon etching. This system is configured for silicon etching with "pseudoBosch" C<sub>4</sub>F<sub>8</sub> and SF<sub>6</sub> gases, and cryogenic silicon etch with SF<sub>6</sub> and O<sub>2</sub>. The silicon ICP-RIE has a variable temperature stage (-150 to 400 °C). This system supports wafer sizes up to 6 inches, and provides accurate deep etching capabilities for silicon and "silicon-like" samples only.  
===== Applications =====
===== Applications =====
* Cryogenic etch of silicon
* Cryogenic etch of silicon
* pseudo-Bosch of silicon
* pseudo-Bosch of silicon
===== Allowed material in Dielectric Etch System =====
===== Allowed material in Dielectric Etch System =====
* Si, Si<sub>x</sub>N<sub>y</sub>, SiO<sub>2</sub>
* Si, Si<sub>x</sub>N<sub>y</sub>, Ge
* PMMA/ZEP/SPR/AZ/maN resists, SiO<sub>x</sub>/Al<sub>2</sub>O<sub>3</sub> hard masks
* PMMA/ZEP/SPR/AZ/maN resists, SiO<sub>x</sub>/Al<sub>2</sub>O<sub>3</sub> hard masks
* No metals
* No metals
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* Ar
* Ar
* N<sub>2</sub>
* N<sub>2</sub>
* CHF<sub>3</sub>
* N<sub>2</sub>O
* N<sub>2</sub>O
* NH<sub>3</sub>
* NH<sub>3</sub>


== Resources ==
== Resources ==
===== Equipment Status =====
* [https://labrunr.caltech.edu/Equipment_2.aspx LabRunr Equipment Status] (Select Oxford_Dielectric from the dropdown menu)
===== SOPs & Troubleshooting =====
===== SOPs & Troubleshooting =====
* [https://caltech.box.com/s/98cjegiimwwivn6zr9ltig1shfb5m6bb General Use SOP]
* [https://caltech.box.com/s/0qe85zye5mjlgqxorxa77tzgqgblv3ep General Use SOP]
* [https://caltech.box.com/s/4qbaqhklg9bak0hlgd469d1ixxtttgxp Etcher toxic gas handling SOP]
* [https://caltech.box.com/s/vbv9di5bn1ha7tus6fq1br41533o21wu Oxford Instruments reservation policy]
* [https://caltech.box.com/s/jesslkguhfgdl9pud83mmtm2ruf6vb50 Power Up Oxford ICP-RIE SOP]
* [https://caltech.box.com/s/jesslkguhfgdl9pud83mmtm2ruf6vb50 Power Up Oxford ICP-RIE SOP]
* [https://caltech.box.com/s/29e5taof6r80d45lfb4sgbup1k6rebpx Gas Status Board SOP]
* [https://caltech.box.com/s/29e5taof6r80d45lfb4sgbup1k6rebpx Gas Status Board SOP]
* [https://caltech.box.com/s/sz9pai0icsntnef6me23veiwtwdui0gm Troubleshooting Guide]


===== Process Documents =====
===== Process Documents =====
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* [https://caltech.box.com/s/z3ibiol0xp1qwi6cyvnghbxs81p8j5q5 Silicon Waveguide Etch]
* [https://caltech.box.com/s/z3ibiol0xp1qwi6cyvnghbxs81p8j5q5 Silicon Waveguide Etch]
* [https://caltech.box.com/s/k8gj2bcluhy50in9m2hwz379hnkn9bdw Silicon Nitride etch]
* [https://caltech.box.com/s/k8gj2bcluhy50in9m2hwz379hnkn9bdw Silicon Nitride etch]
* [https://caltech.box.com/s/4e6rskkmv1sgu9ipgfnrzeq0cguo1gc0 Hard Mask Oxide Etch]
* [https://caltech.box.com/s/daa9zeonjqphc8v963mi3lojo8me0u9j Cryo-Si Etch]
* [https://caltech.box.com/s/daa9zeonjqphc8v963mi3lojo8me0u9j Cryo-Si Etch]
* [https://caltech.box.com/s/ymt2wqtkkjwcyw5c71f2adm2a1u041zn Etch chamber cleaning recipes]
* [https://caltech.box.com/s/ymt2wqtkkjwcyw5c71f2adm2a1u041zn Etch chamber cleaning recipes]
* [https://caltech.box.com/s/3b9zbdj1uoazz7zbz8png25c2ba65vas Comparison of etch rates using different sample-fixing oils]
===== Review Articles =====
* [https://caltech.box.com/s/3fnc4a7qeyr1up6kth599j7ojybka2vb Guidelines for Etching Silicon MEMS Structures]
* [https://caltech.box.com/s/j61w7vr4f8cdjr64jrnz1t37oizdhl7f Etch rates for MEMS Processing - Part I]
* [https://caltech.box.com/s/ls0jl268j4at6z39g6kv8wivevpq80eh Etch Rates for MEMS Processing - Part II]
* [https://caltech.box.com/s/cetpre7d66gssbhtaicnhtovyo6ngzjv Dry Etching of Electronic Oxides, Polymers, and Semiconductors]
* [https://caltech.box.com/s/pauf384duhejuwzfwan71eam7nkvdrxw Alumina etch masks for fabrication of high-aspect-ratio silicon micropillars and nanopillars]
* [https://caltech.box.com/s/q42u5q46nmx2hm53szub556kwcrc0oih David Henry's thesis on dry etching in the KNI's tools]


===== Manufacturer Manuals =====
===== Manufacturer Manuals =====
* [https://caltech.box.com/s/tfieodeis71aligdpgp3g13kuceefnh0 Oxford Plasmalab System 100 Dielectric Etcher Manual]
* [https://labrunr.caltech.edu/machinefiles/124/System%20Manual%20for%20Caltech%2094-219846_a.pdf Oxford Plasmalab System 100 Dielectric Etcher Manual] (<i>login to LabRunr required</i>)
* [https://caltech.box.com/s/juzfel0sy2fv6y3d1zcul8lc3z6ipha4 Edwards Pyrophoric Conditioning System Manual]
* [https://caltech.box.com/s/juzfel0sy2fv6y3d1zcul8lc3z6ipha4 Edwards Pyrophoric Conditioning System Manual]
* [https://caltech.box.com/s/gclvux5tu28rpssvwncx5sm518uhmebl Edwards QDP 80 dry vacuum pump Manual]
* [https://caltech.box.com/s/gclvux5tu28rpssvwncx5sm518uhmebl Edwards QDP 80 dry vacuum pump Manual]
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===== Manufacturer Specifications =====
===== Manufacturer Specifications =====
* [https://caltech.box.com/s/85mj9roas98jtwee9d22hk0wk9un54fl Manufacturer System Configuration]
* [https://caltech.box.com/s/85mj9roas98jtwee9d22hk0wk9un54fl Manufacturer System Configuration]
===== System Features =====
===== System Features =====
* Universal base console which houses the electronic sub systems, control units, pneumatics, and turbomolecular pump
* Universal base console which houses the electronic sub systems, control units, pneumatics, and turbomolecular pump
* PC 2000 Operating system  
* PC 2000 Operating system  
* ICP process chamber with 200mm pumping port, view port and end-point-detection ports for optical emission spectrometer and laser interferometer
* ICP process chamber with 200 mm pumping port, view port and end-point-detection ports for optical emission spectrometer and laser interferometer
* Variable height 240mm Cryo RIE electrode  
* Variable height 240 mm Cryo RIE electrode  
* Parameter ramping software (Not Bosch)
* Parameter ramping software (Not Bosch)
* 100-mTorr, temperature-stabilized capacitance manometer for process control with an active penning gauge for base pressure measurement
* 100-mTorr, temperature-stabilized capacitance manometer for process control with an active penning gauge for base pressure measurement
* 200mm pumping port is fitted with a 200mm variable gate valve for chamber isolation and process pressure control
* 200 mm pumping port is fitted with a 200mm variable gate valve for chamber isolation and process pressure control
* Twelve line gas pod with 7 non-toxic and 3 toxic digital mass-flow-controlled gas lines
* Twelve line gas pod with 7 non-toxic and 3 toxic digital mass-flow-controlled gas lines
* Chamber Gas ring, with split gas manifold
* Chamber Gas ring, with split gas manifold
* Alcatel 1300 l/s MAGLEV  turbo pump
* Alcatel 1300 l/s MAGLEV  turbo pump
* Single-wafer automatic insertion load lock with soft pump option
* Single-wafer automatic insertion load lock with soft pump option
===== System Specifications =====
* Chamber wall heating 80 &deg;C
* Cryo table range -140 to 400 &deg;C
* ICP 380 mm remote high-density plasma source with 5 kW RF generator and automatic matching unit close-coupled to the source.
* Substrate bias control by 30 / 300 W RIE source
* Helium back-side wafer cooling




===== System Specifications =====
== Related Tools ==
* Chamber wall heating 80 deg C
* [https://lab.kni.caltech.edu/ICP-RIE:_III-V,_Metal_%26_Silicon_Etcher Oxford III-V ICP-RIE]
* Cryo table range -140 to 400 deg C
* [https://lab.kni.caltech.edu/DRIE:_Bosch_%26_Cryo_ICP-RIE_for_Silicon Oxford DRIE ICP-RIE]
* ICP 380mm remote high-density plasma source with 5kW RF generator and automatic matching unit close-coupled to the source.
* [https://lab.kni.caltech.edu/Dual_Chamber_RIE:_Silicon,_III-V_Material_%26_Organics_Etcher Plasma-Therm RIE]
* Substrate bias control by 30 / 300W RIE source
* [https://lab.kni.caltech.edu/XeF2_Etcher_for_Silicon XeF2 Etcher]
* Helium back-side wafer cooling
* [https://lab.kni.caltech.edu/Plasma-Enhanced_Chemical_Vapor_Deposition_(PECVD) Oxford PECVD]
* [https://lab.kni.caltech.edu/FlexAL_II:_Atomic_Layer_Deposition_(ALD) Oxford ALD]

Latest revision as of 05:32, 30 June 2022

Dielectric Etcher
ICP-RIE Dielectric-Material-Etcher .jpg
Instrument Type Etching
Techniques Dielectric Material Etching
Staff Manager Kelly McKenzie
Staff Email kmmckenz@caltech.edu
Staff Phone 626-395-5732
Reserve time on LabRunr
Request training by email
Sign up for Oxford ICP email list
Lab Location B235 Steele
Lab Phone 626-395-1532
Manufacturer Oxford Instruments
Model Plasmalab System 100

Description

The Dielectric inductively-coupled plasma reactive-ion etcher (ICP-RIE) is an Oxford Instruments Plasma Technology Plasmalab System 100 ICP-RIE 380 system that is optimized for silicon etching. This system is configured for silicon etching with "pseudoBosch" C4F8 and SF6 gases, and cryogenic silicon etch with SF6 and O2. The silicon ICP-RIE has a variable temperature stage (-150 to 400 °C). This system supports wafer sizes up to 6 inches, and provides accurate deep etching capabilities for silicon and "silicon-like" samples only.

Applications
  • Cryogenic etch of silicon
  • pseudo-Bosch of silicon
Allowed material in Dielectric Etch System
  • Si, SixNy, Ge
  • PMMA/ZEP/SPR/AZ/maN resists, SiOx/Al2O3 hard masks
  • No metals
Dielectric Etcher Gas List
  • SF6
  • C4F8
  • O2
  • Ar
  • N2
  • N2O
  • NH3

Resources

Equipment Status
SOPs & Troubleshooting
Process Documents
Review Articles
Manufacturer Manuals

Specifications

Manufacturer Specifications
System Features
  • Universal base console which houses the electronic sub systems, control units, pneumatics, and turbomolecular pump
  • PC 2000 Operating system
  • ICP process chamber with 200 mm pumping port, view port and end-point-detection ports for optical emission spectrometer and laser interferometer
  • Variable height 240 mm Cryo RIE electrode
  • Parameter ramping software (Not Bosch)
  • 100-mTorr, temperature-stabilized capacitance manometer for process control with an active penning gauge for base pressure measurement
  • 200 mm pumping port is fitted with a 200mm variable gate valve for chamber isolation and process pressure control
  • Twelve line gas pod with 7 non-toxic and 3 toxic digital mass-flow-controlled gas lines
  • Chamber Gas ring, with split gas manifold
  • Alcatel 1300 l/s MAGLEV turbo pump
  • Single-wafer automatic insertion load lock with soft pump option
System Specifications
  • Chamber wall heating 80 °C
  • Cryo table range -140 to 400 °C
  • ICP 380 mm remote high-density plasma source with 5 kW RF generator and automatic matching unit close-coupled to the source.
  • Substrate bias control by 30 / 300 W RIE source
  • Helium back-side wafer cooling


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